As an Electrical Engineer I was designing sub-1u in the 1990s
And it was a big deal because there were scientists who thought breaking the 1u barrier couldn't be done. Then there were scientists who thought that breaking the 0.1u barrier couldn't be done (until it was in the early 2000s).
The problem is that molecular sizes are measured in angstroms, or 10-10. There comes a point where the polysilicon gate simply can't be made physically wide enough to carry enough electrical charge to manipulate the gate. One would logically think that this occurs at 3 molecules in thickness.
But, so far that limitation has not revealed itself!
Why are the graphs so imprecise?
Because applications vary all over the place. Logic led the way with sub-micron designs very early on because they needed vanishingly low power. Remember what I said about "not enough electrical charge?" Well... if you don't need a lot of electrical charge in the first place... Saving the planet was only one of the reasons driving low-power designs.
At the same time, you still had applications ranging from audio to bus drivers that had to push a boatload of energy somewhere. Those designs were still being build with 5-10u scale transistors. In my world, we dealt with BiCMOS (bipolar and CMOS tech on the same wafer). We commonly mixed sub-micron CMOS with super-micron bipolar.
Even in the future, there will always be reasons to build bigger-than-nanometer gates. But that won't stop us from building nanometer gates.
But the simple answer is: the graphs reflect when the technology was commonly used, not when it was first used or initially available. In short, the graphs are conservative.
OK, so what date should I use?
I'm a fan of 2000. It's a nice, round number and reflects some of the earliest uses of 0.2u and less designs.